Some semiconductor integrated circuitries have incorporated therein some types of signal detecting circuits. Typical of such signal detecting circuits are testing circuits for testing address decoders provided within the memory systems on integrated circuit chips on the basis of built-in self-diagnosis programs incorporated in the integrated circuit chips.
One of the most important problems of known address decoder testing circuits for memory systems fabricated on semiconductor integrated circuit chips is the requirement for vast numbers of semiconductor devices to implement the testing circuits. The use of such an extremely large number of semiconductor devices on a single chip will result in a large share of the area which the decoder testing circuit occupies on the chip and further in a large number of opportunities of failure taking place in the testing area of the chip. The present invention contemplates provision of an improved address decoder testing circuit which will eliminate or broadly alleviate these problems.